/*
 * AssemblerApplication2.asm
 *
 *  Created: 2/13/2014 1:10:34 AM
 *   Author: Vincent Ibanez
 */ 
 
.MACRO INITSTACK 
 LDI R16,HIGH(RAMEND) 
 OUT SPH,R16 
 LDI R16,LOW(RAMEND) 
 OUT SPL,R16 
 .ENDMACRO 
 
INITSTACK ;use Macro here 

ldi R16, 0xF5;seed
ldi R18,20			;this will be our counter
store_loop:

	rcall rand_7	;this is the pseudo rand num gen
	push R16		;push 20 rand num here
	dec	R18
brne store_loop		;loop 20 times

ldi R17,20			;this will be our counter
ldi R21,0			;clear div3l counters
ldi R20,0			;clear div3h counters
ldi R24,0			;clear div5l counters
ldi R23,0			;clear div5h counters
parse_loop:
	pop R16
	rcall add3		;add routine, adds if number is divisble 3
	rcall add5		;add routine, adds if number is divisble 5
	dec	R17
brne parse_loop		;parse 20 num from stack

stop:
	rjmp stop		; END of main instruction


rand_7:						;pseudo rand num Routine-store to R16
	lsl   r16				;logical shift left bit 7 to C
	sbrs  r16,7				;test MSB of R4, if set skip 1 
	rjmp	done_rand		;if not, done
	ldi   r31,0b10110101	; first poly byte 
	eor   r16,r31			; XOR 
	done_rand:				;done

	ldi	r17, 250			;upper bound check
	sub	r17,r16				;250 - rand
	brlo rand_7				;branch if minus
	breq rand_7				;branch if equal

	ldi	r17, 30				;lower bound check
	sub	r17,r16				;30 - rand
	brpl rand_7				;branch if plus

	ret

add3:						;adds R16 to R20:R21 if divisible by 3

LDI R18,9					;R18-shift counter
MOV R19, R16				;R19 will be manipulated for checking
ROR R19
add3_loop_0:
	ROL	R19					;rotate left with the carry bit
	dec	R18
	breq add3_done			;loop 8 times, div3 if branch taken
	SBRS R19,7				;if 7bit is 1 jmp add3_loop_med
	RJMP add3_loop_0		;	else jmp to add3_loop_0

add3_loop_med:
	ROL	R19					;rotate left with the carry bit
	dec	R18
	breq add3_done_1		;loop 8 times, not div3 if branch taken
	SBRC R19,7				;if 7bit is 0 jmp add3_loop_1
	RJMP add3_loop_0		;	else jmp to add3_loop_0
add3_loop_1:
	ROL	R19					;rotate left with the carry bit
	dec	R18
	breq add3_done_1		;loop 8 times, not div3 if branch taken
	SBRS R19,7				;if 7bit is 1 jmp add3_loop_1
	RJMP add3_loop_med		;	else jmp to add3_loop_med
	rjmp add3_loop_1

add3_done:

add	R21, R16				;add 16 to R20:R21
ldi R18, 0		
adc R20, R18

add3_done_1:
ret

add5:						;adds R16 to R23:R25 if divisible by 5

MOV R22, R16				;R20 used for bit manipulation
LDI R19,0					;R19 will be our zero
LDI R25,0					;R25 will be our odd bit alternate sumdiff
LDI R26,0					;R26 will be our even bit alternate sumdiff

ROL	R22						;rotate right with the carry bit
ADC R25, R19				;	add odd bit
ROL	R22						;rotate right with the carry bit
ADC R26, R19				;	add even bit
ROL	R22						;rotate right with the carry bit
SBC R25, R19				;	subtract odd bit
ROL	R22						;rotate right with the carry bit
SBC R26, R19				;	subtract even bit

ROL	R22						;rotate right with the carry bit
ADC R25, R19				;	add odd bit
ROL	R22						;rotate right with the carry bit
ADC R26, R19				;	add even bit
ROL	R22						;rotate right with the carry bit
SBC R25, R19				;	subtract odd bit
ROL	R22						;rotate right with the carry bit
SBC R26, R19				;	subtract even bit

LDI R18, 2					;x=(2*odd)+even
MULS R25, R18
ADD R26, R0
BREQ add5_add				;if x=0, R16 is div5, add to sum
SUBI R26, 5
BREQ add5_add				;if x=5, R16 is div5, add to sum
rjmp add5_done				;	else dont add, not div5

add5_add:
add	R24, R16				;add 16 to R20:R21
ldi R18, 0
adc R23, R18

add5_done:
ret
